RealView Debugger Target Configuration Guide: 3.8.1. Default settings for processor exceptions

Table 3.2 lists the default settings for the exceptions in the Connection Properties.

Table 3.2. Default settings for Processor Exceptions

Exception	Default	Comment
Reset	`True`	Catch Reset exceptions.
Undefined	`True`	Catch Undefined/Illegal Instructions.
SVC	`False`	Set to `True` to catch SuperVisor Call (SVC) interrupts. The SVC exception can also be trapped by the debugger to enable standard semihosting. Note For non ARMv7-M processors with the semihosting vector set to the default (`0x8`), you cannot enable the SVC vector catch if semihosting is enabled.
Prefetch Abort	`True`	Catch Prefetch abort (instruction fetch memory fault) exceptions.
Data Abort	`True`	Catch Data abort (data access memory fault) exceptions.
Address	`True`	Catch Address exceptions. Used only by the obsolete 26-bit ARM processor architectures.
IRQ	`False`	Set to `True` to catch interrupt requests.
FIQ	`False`	Set to `True` to catch fast interrupt requests.
Error	`True`	Catch Error exceptions. Supported only for RVISS targets.

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