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Table B.8 describes the configuration parameters for the Cortex-M0 model.
Table B.8. Cortex-M0 model configuration parameters
| Parameter | Description | Default |
|---|---|---|
BIGEND | Run in big-endian (BE8) mode. | False |
CFGITCMEN | Reset values of AuxControl Instruction Tightly-Coupled Memory (ITCM) alias enable bits. | 0x1 |
dbg_extension | Use debug extensions. | False |
os_extension | Use OS extensions. | True |
semihosting_BKPT | The breakpoint used for semihosting. The value
must be in the range 0 to 255 (0xFF). | 0xAB |
semihosting_cmd_line | Semihosting command line string used for passing command-line arguments to an image. Separate each argument with a space, and quote any arguments that include a space, for example:
| |
semihosting_debug | Print verbose messages for semihosting. | False |
semihosting_enabled | Enable or disable semihosting. NoteIf you disable semihosting, the model hard faults if it encounters
a semihosting | True |
semi_heap_base | Semihosting heap base. The value must be in
the range 0 to 4294967295 (0xFFFFFFFF). | 0x0 |
semi_heap_limit | Semihosting heap limit. The value must be in
the range 0 to 4294967295 (0xFFFFFFFF). | 0xF000000 |
semi_stack_base | Semihosting stack base. The value must be in
the range 0 to 4294967295 (0xFFFFFFFF). | 0x10000000 |
semi_stack_limit | Semihosting stack limit. The value must be
in the range 0 to 4294967295 (0xFFFFFFFF). | 0xF000000 |
warn_extra | Print additional warning messages. | False |
warn_undefined | Print a warning when an undefined instruction is hit. | False |