B.2.3. Cortex-M0 configuration parameters

Table B.8 describes the configuration parameters for the Cortex-M0 model.

Table B.8. Cortex-M0 model configuration parameters

ParameterDescriptionDefault
BIGENDRun in big-endian (BE8) mode.False
CFGITCMENReset values of AuxControl Instruction Tightly-Coupled Memory (ITCM) alias enable bits.0x1
dbg_extensionUse debug extensions.False
os_extensionUse OS extensions.True
semihosting_BKPTThe breakpoint used for semihosting. The value must be in the range 0 to 255 (0xFF).0xAB
semihosting_cmd_line

Semihosting command line string used for passing command-line arguments to an image. Separate each argument with a space, and quote any arguments that include a space, for example:

argument1 "argument 2" argument_3

 
semihosting_debugPrint verbose messages for semihosting.False
semihosting_enabled

Enable or disable semihosting.

Note

If you disable semihosting, the model hard faults if it encounters a semihosting BKPT instruction.

True
semi_heap_baseSemihosting heap base. The value must be in the range 0 to 4294967295 (0xFFFFFFFF).0x0
semi_heap_limitSemihosting heap limit. The value must be in the range 0 to 4294967295 (0xFFFFFFFF).0xF000000
semi_stack_baseSemihosting stack base. The value must be in the range 0 to 4294967295 (0xFFFFFFFF).0x10000000
semi_stack_limitSemihosting stack limit. The value must be in the range 0 to 4294967295 (0xFFFFFFFF).0xF000000
warn_extraPrint additional warning messages.False
warn_undefinedPrint a warning when an undefined instruction is hit.False

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