cfgte | Set processor to Thumb-2 mode when entering
an exception. | False |
cfgend0 | Set processor to BE-8 endianness when entering
an exception. | False |
cfgnmfi | FIQ is to be non-maskable. | False |
clock-frequency | Processor clock frequency in Hz. | 1000000000 |
cp15sdisable | Disable CP15 secure operation. | False |
cpexist | Bitmask to enable some or all of CP0 to CP13. | 3072 |
fast_invalidate | Encode value for Fast-Invalidate operations. | 0 |
ISSCmpon | Enable ISS Compare. | False |
l1_cachesize | Define L1 cache size in Kb (16 or 32). | 32 |
l2_cachesize | Define L2 cache size in Kb (0, 64, 128, 256,
..., 2048). | 256 |
NoNEON | Disable NEON and VFP. | False |
semihosting-ARM_SVC | The ARM SuperVisor Call (SVC)
used for semihosting. The value must be in the range 0 to 16777215
(0xFFFFFF). | 0x123456 |
semihosting-cmd_line | Semihosting command line string used
for passing command-line arguments to an image. Separate each argument with
a space, and quote any arguments that include a space, for example: argument1
"argument 2" argument_3
| |
semihosting-debug | Print verbose messages for semihosting. | False |
semihosting-enable | Enable or disable semihosting. | True |
semihosting-heap_base | Semihosting heap base. The value must be in
the range 0 to 4294967295 (0xFFFFFFFF). | 0 |
semihosting-heap_limit | Semihosting heap limit. The value must be in
the range 0 to 4294967295 (0xFFFFFFFF). | 0x7000000 |
semihosting-stack_base | Semihosting stack base. The value must be in
the range 0 to 4294967295 (0xFFFFFFFF). | 0x8000000 |
semihosting-stack_limit | Semihosting stack limit. The value must be
in the range 0 to 4294967295 (0xFFFFFFFF). | 0x7000000 |
semihosting-Thumb_SVC | The Thumb SVC used for semihosting. The value
must be in the range 0 to 255 (0xFF). | 0xAB |
siliconid | Defined reset value of CP15 Silicon ID register. | 0x41000000 |
vinithi | Exception vectors start at 0xFFFF0000. | False |
warn-extra | Print additional warning messages. | False |
warn-undefined | Print a warning when an undefined instruction
is hit. | False |
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