Integrator™/CM922T-XA10 User Guide 7.5. CM control and status registers for the CP image

7.5. CM control and status registers for the CP image

The CP PLD image provides a set of status and control registers, interrupt registers and flag registers. These are located within the PLD0 memory map region. Table 7.4 lists the CM registers for the CP image.

Table 7.4. Core module status, control, and interrupt registers

Register Name	Address	Access	Reference or description
CM_ID	0x10000000	Read	Core module ID register, CM_ID
CM_PROC	0x10000004	Read	Core module processor register, CM_PROC
CM_OSC	0x10000008	Read/write	Core module oscillator register for the CP image, CM_OSC
CM_CTRL	0x1000000C	Read/write	Core module control and status register for the CP image, CM_CTRL
CM_STAT	0x10000010	Read	Core module status register, CM_STAT
CM_LOCK	0x10000014	Read/write	Core module lock register, CM_LOCK
CM_AUXOSC	0x1000001C	Read/write	Core module auxiliary oscillator register for the CP image, CM_AUXOSC
CM_SDRAM	0x10000020	Read/write	SDRAM status and control register, CM_SDRAM
-	0x10000024	-	Reserved.
CM_REFCNT	0x10000028	Read	Core module reference clock cycle counter, CM_REFCNT
-	0x1000002C	-	Reserved
CM_FLAGS	0x10000030	Read	CM flag registers
CM_FLAGSS	0x10000030	Write
CM_FLAGSC	0x10000034	Write
CM_NVFLAGS	0x10000038	Read
CM_NVFLAGSS	0x10000038	Write
CM_NVFLAGSC	0x1000003C	Write
CM_IRQ_STAT	0x10000040	Read	CM interrupt controller
CM_IRQ_RSTAT	0x10000044	Read
CM_IRQ_ENSET	0x10000048	Read/write
CM_IRQ_ENCLR	0x1000004C	Write
CM_SOFT_INTSET	0x10000050	Read/write
CM_SOFT_INTCLR	0x10000054	Write
CM_FIQ_STAT	0x10000060	Read
CM_FIQ_RSTAT	0x10000064	Read
CM_FIQ_ENSET	0x10000068	Read/write
CM_FIQ_ENCLR	0x1000006C	Write
-	`0x10000070`	-	Reserved
-	`0x10000080`	-	Reserved
-	`0x10000090`	-	Reserved
-	0x10000080 - 0x107FFFFF	-	Reserved

Note

All registers are 32-bits wide and only support word-wide writes. Do not implement registers at locations marked reserved. Preserve the register bits marked as reserved in the following sections by using read-modify-write operations.

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