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| Home > IM-PD1 Image for Operation with an Integrator/IM-PD1 > Integrator/CM922T-XA10 and IM-PD1 register memory map | |||
Table 8.3 shows the register memory map for the Integrator/CM922T-XA10 and IM-PD1 system and provides references to sections that contain more information about the registers.
Table 8.3. Integrator/CM922T-XA10 and IM-PD1 system register map
| Peripheral | Address | See |
|---|---|---|
| Core Module control registers | 0x10000000 | CM control and status registers for the IM-PD1 image |
| Core Module interrupt controller | 0x10000040 | CM interrupt controller |
| IM-PD1 control registers | 0xC0000000 | IM-PD1 registers |
| UART0 | 0xC01000000 | UART interface |
| UART1 | 0xC0200000 | IrDA interface |
| SSP | 0xC0300000 | Touchscreen controller |
| GPIO0 | 0xC0400000 | See the Integrator/CP Baseboard User Guide |
| GPIO1 | 0xC0500000 | |
| SCI | 0xC0600000 | Smart card interface |
| MultiMedia Card Interface | 0xC0700000 | MMC interface |
| Advanced Audio CODEC Interface | 0xC0800000 | Audio CODEC |
| CLCD regs/palette | 0xC1000000 | Display interface |
| Vectored interrupt controller | 0xC3000000 | Vectored interrupt controller |
Device registers are usually mapped repeatedly to fill their assigned spaces. However, to ensure correct operation on future product versions, it is advisable to only access registers at their true addresses.