4.2.3. Example ARM header

Example 4.2 contains four sections of code. Each of the code sections is described after the example.

Example 4.2. 


     AREA     AddReg,CODE,READONLY  ; Name this block of code.
     ENTRY                          ; Mark first instruction to call.

     ADR r0, ThumbProg + 1          ; Generate branch target address
                                    ; and set bit 0, hence arrive
                                    ; at target in Thumb state.
     BX  r0                         ; Branch exchange to ThumbProg.

     THUMB                          ; Subsequent instructions are Thumb code.
     MOVS r2, #2                    ; Load r2 with value 2.
     MOVS r3, #3                    ; Load r3 with value 3.
     ADDS r2, r2, r3                ; r2 = r2 + r3
     ADR r0, ARMProg
     BX  r0		                         ; Branch exchange to ARMProg.

     ARM                            ; Subsequent instructions are ARM code.
     MOV r4, #4
     MOV r5, #5
     ADD r4, r4, r5

stop MOV r0, #0x18                  ; angel_SWIreason_ReportException
     LDR r1, =0x20026               ; ADP_Stopped_ApplicationExit
     SVC 0x123456                   ; ARM semihosting (formerly SWI)
     END                            ; Mark end of this file.

SECTION 1 implements a short header section of ARM code that changes the processor to Thumb state. The header code uses:

SECTION 2 of the code, labeled ThumbProg, is prefixed by a THUMB directive. This instructs the assembler to treat the following code as Thumb code. The Thumb code adds the contents of two registers together.

The code again uses an ADR instruction to get the address of the label ARMProg, but this time the least significant bit is left clear. The BX instruction changes the state back to ARM state.

SECTION 3 of the code, labeled ARMProg, adds together the contents of two registers.

SECTION 4 of the code, labeled stop, uses semihosting to report normal application exit. See RealView Compilation Tools v3.0 Compiler and Libraries Guide for more information on semihosting.


Thumb semihosting uses a different SVC number from the ARM semihosting (0xAB rather than 0x123456).

Exporting symbols

If you export a symbol that references Thumb instructions, the linker automatically adds one to the address of any label in Thumb code.

If you do not export a symbol, you must manually add one to the symbol that references the Thumb instructions. In Example 4.2 it is ThumbProg+1. This is because all references are resolved by the assembler, and the linker never detects the symbol.

Building the example

To build and execute the example:

  1. Enter the code using any text editor and save the file as addreg.s.

  2. Type armasm -g addreg.s at the command prompt to assemble the source file.

  3. Type armlink addreg.o -o addreg to link the file.

  4. Run the image using a compatible debugger, for example RealView® Debugger or AXD, with an appropriate debug target. If you step through the program one instruction at a time, you see the processor enter the Thumb state. See the user documentation for the debugger you are using to find out how this change is indicated.

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