7.2. Target transfer of data

The target accesses the DCC as coprocessor 14 on the core using the ARM instructions MCR and MRC.

Two registers are provided to transfer data:

Comms data read register

A 32-bit wide register used to receive data from the debugger. The following instruction returns the read register value in Rd:


MRC p14, 0, Rd, c1, c0

Comms data write register

A 32-bit wide register used to send data to the debugger. The following instruction writes the value in Rn to the write register:


MCR p14, 0, Rn, c1, c0

Note

See the appropriate Technical Reference Manual for information on accessing DCC registers for the ARM10 and ARM11 cores. The instructions used, positions of the status bits, and interpretation of the status bits are different for processors later than ARM9.

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