When the SVC handler is entered, it must establish which SVC is being called. This information can be stored in bits 0-23 of the instruction itself, as shown in Figure 6.3, or passed in an integer register, usually one of r0-r3.

The top-level SVC handler can load the SVC instruction relative to the link register. Do this in assembly language, C/C++ inline, or embedded assembler.

The handler must first load the SVC instruction that caused the exception into a register. At this point, lr_SVC holds the address of the instruction that follows the SVC instruction, so the SVC is loaded into the register (in this case r0) using:

The handler can then examine the comment field bits, to determine the required operation. The SVC number is extracted by clearing the top eight bits of the opcode:

Example 6.6 shows how you can put these instructions together to form a top-level SVC handler.

See Determining the processor state for an example of a handler that deals with SVC instructions in both ARM state and Thumb state.

    PRESERVE8

    AREA TopLevelSVC, CODE, READONLY   ; Name this block of code.
    EXPORT     SVC_Handler
SVC_Handler
    STMFD      sp!,{r0-r12,lr}         ; Store registers.
    LDR        r0,[lr,#-4]             ; Calculate address of SVC instruction
                                       ; and load it into r0.
    BIC        r0,r0,#0xff000000       ; Mask off top 8 bits of instruction
                                       ; to give SVC number.
    ;
    ; Use value in r0 to determine which SVC routine to execute.
    ;
    LDMFD        sp!, {r0-r12,pc}^     ; Restore registers and return.
    END                                ; Mark end of this file.