6.1.3. Use of modes and registers by exceptions

Typically, an application runs in User mode, but servicing exceptions requires a privileged mode. An exception changes the processor mode, and this in turn means that each exception handler has access to a certain subset of the banked registers:

In the case of an FIQ, each exception handler has access to five more general purpose registers (r8_FIQ to r12_FIQ).

Each exception handler must ensure that other registers are restored to their original contents on exit. You can do this by saving the contents of any registers that the handler has to use onto its stack and restoring them before returning. If you are using Angel or RealView ARMulator® ISS, the required stacks are set up for you. Otherwise, you must set them up yourself.

Note

As supplied, the assembler does not predeclare symbolic register names of the form register_mode. To use this form, you must declare the appropriate symbolic names with the RN assembler directive, for example, lr_FIQ RN r14 declares the symbolic register name lr_FIQ for r14. See the directives chapter in RealView Compilation Tools v3.0 Assembler Guide for more information on the RN directive.

Copyright © 2002-2006 ARM Limited. All rights reserved.ARM DUI 0203G
Non-Confidential