4.11.1. ADR pseudo-instruction

Load a program-relative or register-relative address into a register.

Syntax

ADR{cond}{.W} register,label

where:

cond

is an optional condition code (see Conditional execution).

.w

is an optional instruction width specifier. See ADR in Thumb-2 for details.

register

is the register to load.

label

is a program-relative or register-relative expression. See Register-relative and program-relative expressions for more information.

Usage

ADR always assembles to one instruction. The assembler attempts to produce a single ADD or SUB instruction to load the address. If the address cannot be constructed in a single instruction, an error is generated and the assembly fails.

ADR produces position-independent code, because the address is program-relative or register-relative.

Use the ADRL pseudo-instruction to assemble a wider range of effective addresses.

If label is program-relative, it must evaluate to an address in the same assembler area as the ADR pseudo-instruction, see AREA.

Range

The available range depends on the instruction set in use:

ARM

±255 bytes to a byte or halfword-aligned address.

±1020 bytes to a word-aligned address.

32-bit Thumb-2

±4095 bytes to a byte, halfword, or word-aligned address.

16-bit Thumb

0 to 1020 bytes. label must be word-aligned. You can use the ALIGN directive to ensure this.

The given range is relative to a point two words after the address of the current instruction. In ARM and Thumb-2, more distant addresses can be in range if the alignment is 16-bytes or more relative to this point.

ADR in Thumb-2

You can use the .W width specifier to force ADR to generate a 32-bit instruction in Thumb-2 code.

ADR.W always generates a 32-bit instruction, even if the address could be generated in a 16-bit ADD or SUB.

For forward references, ADR without .W always generates a 16-bit instruction in Thumb code, even if that results in failure for an address that could be generated in a 32-bit Thumb-2 ADD instruction.

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