4.2.9. PUSH and POP

Push registers onto the stack.

Pop registers off the stack.

Syntax

PUSH{cond} reglist
POP{cond} reglist

where:

cond

is an optional condition code (see Conditional execution).

reglist

is a list of registers or register ranges, enclosed in braces. It can contain register ranges. It must be comma separated if it contains more than one register or register range.

Usage

PUSH and POP are synonyms for STMDB and LDM (or LDMIA), with the base register r13 (sp), and the adjusted address written back to the base register. PUSH and POP are the preferred mnemonic in these cases.

Registers are stored on the stack in numerical order, with the lowest numbered register at the lowest address.

POP, with reglist including the pc

This instruction causes a branch to the address popped off the stack into pc. This is usually a return from a subroutine, where the lr was pushed onto the stack at the start of the subroutine.

In ARMv5T and above:

  • if bits[1:0] of the value loaded to pc are b00, the processor changes to ARM state

  • bits[1:0] must not have the value b10.

In ARMv4T and earlier, bits[1:0] of the value loaded to pc are ignored, so POP cannot be used to change state.

16-bit instructions

16-bit versions of a subset of these instructions are available in Thumb-2 code, and in Thumb code on other Thumb-capable processors.

The following restriction applies to the 16-bit instructions:

  • all registers in reglist must be Lo registers, except that PUSH can include the LR, and POP can include the PC.

Architectures

These ARM instructions are available in all versions of the ARM architecture.

These 32-bit Thumb-2 instructions are available in T2 variants of ARMv6 and above.

These 16-bit Thumb instructions are available in all T variants of the ARM architecture.

In T variants of ARMv5 and above, a load to r15 also causes:

  • in ARM state, a change to Thumb state, if bit[0] of the value loaded is 1

  • in Thumb state, a change to ARM state, if bit[0] of the value loaded is 0.

The state change behavior can be disabled by setting the L4 bit (bit[15]) in cp15. See ARM Architecture Reference Manual for more details.

16-bit examples

    PUSH    {r0,r3,r5}
    PUSH    {r1,r4-r7} ; pushes r1, r4, r5, r6, and r7
    PUSH    {r0,LR}
    POP     {r2,r5}
    POP     {r0-r7,pc} ; pop and return from subroutine

ARM and 32-bit Thumb-2 examples

    PUSH    {r0,r3,r5}
    PUSH    {r1,r4-r11}
    PUSH    {r0,LR}
    POP     {r8,r12}
    POP     {r0-r10,pc}

Incorrect example

    PUSH    {}          ; must be at least one register in list
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