5.1. The Vector Floating Point coprocessor

The Vector Floating Point (VFP) coprocessor, together with associated support code, provides single-precision and double-precision floating-point arithmetic, as defined by ANSI/IEEE Std. 754-1985 IEEE Standard for Binary Floating-Point Arithmetic. This document is referred to as the IEEE 754 standard in this chapter. There is a summary of the standard in the floating-point chapter in RealView Compilation Tools v2.2 Compiler and Libraries Guide.

Short vectors of up to eight single-precision or four double-precision numbers are handled particularly efficiently. Most arithmetic instructions can be used on these vectors, enabling single-instruction, multiple-data (SIMD) parallelism. In addition, the floating-point load and store instructions have multiple register forms, enabling vectors to be transferred to and from memory efficiently.

For more details of the VFP coprocessor, see ARM Architecture Reference Manual.

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