5.8.1. FLD pseudo-instruction

The FLD pseudo-instruction loads a VFP floating-point register with a single-precision or double-precision floating-point constant.


You can use FLD only if the command-line option --fpu is set to vfpv2.

This section describes the FLD pseudo-instruction only. See FLD and FST for information on the FLD instruction.


FLD<precision>{cond} fp-register,=fp-literal



can be S for single-precision, or D for double-precision.


is an optional condition code.


is the floating-point register to be loaded.


is a single-precision or double-precision floating-point literal (see Floating-point literals).


The assembler places the constant in a literal pool and generates a program-relative FLD instruction to read the constant from the literal pool. One word in the literal pool is used to store a single-precision constant. Two words are used to store a double-precision constant.

The offset from the PC to the constant must be less than 1KB. You are responsible for ensuring that there is a literal pool within range. See LTORG for more information.


        FLDD    d1,=3.12E106    ; loads 3.12E106 into d1
        FLDS    s31,=3.12E-16   ; loads 3.12E-16 into s31
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