4.10.9. MAR and MRA

XScale coprocessor 0 instructions.

Transfer between two general-purpose registers and a 40-bit internal accumulator.


MAR{cond} Acc, RdLo, RdHi
MRA{cond} RdLo, RdHi, Acc



is an optional condition code (see Conditional execution).


is the internal accumulator. The standard name is accx, where x is an integer in the range 0 to n. The value of n depends on the processor. It is 0 for current processors.

RdLo, RdHi

are general-purpose registers.


The MAR instruction copies the contents of RdLo to bits[31:0] of Acc, and the least significant byte of RdHi to bits[39:32] of Acc.

The MRA instruction:

  • copies bits[31:0] of Acc to RdLo

  • copies bits[39:32] of Acc to RdHi bits[7:0]

  • sign extends the value by copying bit[39] of Acc to bits[31:8] of RdHi.


These ARM instructions are only available in XScale processors.

There are no Thumb or Thumb-2 versions of these instructions.


    MAR     acc0, r0, r1
    MRA     r4, r5, acc0
    MARNE   acc0, r9, r2
    MRAGT   r4, r8, acc0
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