4.4.8. SMLAD and SMLSD

Dual 16-bit Signed Multiply with Addition or Subtraction of products and 32-bit accumulation.

Syntax

op{X}{cond} Rd, Rm, Rs, Rn

where:

op

is one of:

SMLAD

Dual multiply, accumulate sum of products.

SMLSD

Dual multiply, accumulate difference of products.

cond

is an optional condition code (see Conditional execution).

X

is an optional parameter. If X is present, the most and least significant halfwords of the second operand are exchanged before the multiplications occur.

Rd

is the destination register.

Rm, Rs

are the registers holding the operands.

Rn

is the register holding the accumulate operand.

Operation

SMLAD multiplies the bottom halfword of Rm with the bottom halfword of Rs, and the top halfword of Rm with the top halfword of Rs. It then adds both products to the value in Rn and stores the sum to Rd.

SMLSD multiplies the bottom halfword of Rm with the bottom halfword of Rs, and the top halfword of Rm with the top halfword of Rs. It then subtracts the second product from the first, adds the difference to the value in Rn, and stores the result to Rd.

Usage

Do not use r15 for any of Rd, Rm, Rs, or Rn.

Condition flags

These instructions do not change the flags.

Architectures

These ARM instructions are available in ARMv6 and above, and E variants of ARMv5.

These 32-bit Thumb-2 instructions are available in T2 variants of ARMv6 and above.

There are no 16-bit Thumb versions of these instructions.

Examples

    SMLSD       r1, r2, r0, r7
    SMLSDX      r11, r10, r2, r3
    SMLADLT     r1, r2, r4, r1
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