4.7.2. SXT, SXTA, UXT, and UXTA

Sign extend or zero extend, with optional Add.

These instructions do any one of the following:

Syntax

op<extend>{cond} Rd, {Rn,} Rm{, rotation}

where:

op

is one of:

SXT

Sign extend.

UXT

Zero extend.

SXTA

Sign extend and add.

UXTA

Zero extend and add.

<extend>

is one of:

B16

Extends two 8-bit values to two 16-bit values.

B

Extends an 8-bit value to a 32-bit value.

H

Extends a 16-bit value to a 32-bit value.

cond

is an optional condition code (see Conditional execution).

Rd

is the destination register.

Rn

is the register holding the number to add (SXTA and UXTA only).

Rm

is the register holding the value to extend.

rotation

is one of:

ROR #8

Value from Rm is rotated right 8 bits.

ROR #16

Value from Rm is rotated right 16 bits.

ROR #24

Value from Rm is rotated right 24 bits.

If rotation is omitted, no rotation is performed.

You must not use r15 for Rd, Rn, or Rm.

Operation

These instructions do the following:

  1. Rotate the value from Rm right by 0, 8, 16 or 24 bits (ARM and Thumb-2 only).

  2. Do one of the following to the value obtained:

    • Extract bits[7:0], sign or zero extend to 32 bits. If the instruction is extend and add, add the value from Rn.

    • Extract bits[15:0], sign or zero extend to 32 bits. If the instruction is extend and add, add the value from Rn.

    • Extract bits[23:16] and bits[7:0] and sign or zero extend them to 16 bits. If the instruction is extend and add, add them to bits[31:16] and bits[15:0] respectively of Rn to form bits[31:16] and bits[15:0] of the result.

Condition flags

These instructions do not change the flags.

16-bit instructions

The following forms of these instructions are available in Thumb code, and are 16-bit instructions when used in Thumb-2 code:

SXTB Rd, Rm

Rd and Rm must both be Lo registers.

SXTH Rd, Rm

Rd and Rm must both be Lo registers.

UXTB Rd, Rm

Rd and Rm must both be Lo registers.

UXTH Rd, Rm

Rd and Rm must both be Lo registers.

Architectures

These ARM instructions are available in ARMv6 and above.

These 32-bit Thumb-2 instructions are available in T2 variants of ARMv6 and above.

These 16-bit Thumb instructions are available in ARMv6 and above.

Examples

    SXTH         r3, r9, r4
    UXTAB16EQ    r0, r0, r4, ROR #16

Incorrect examples

    UXTAB    r0, r2, r15         ; use of r15 not permitted
    SXTH     r9, r3, r2, ROR #12 ; rotation must be by 0, 8, 16, or 24.
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