4.6.3. SSAT16 and USAT16

Parallel halfword Saturating instructions.

Syntax

op{cond} Rd, #sat, Rm

where:

op

is one of:

SSAT16

Signed saturation.

USAT16

Unsigned saturation.

cond

is an optional condition code (see Conditional execution).

Rd

is the destination register.

sat

specifies the bit position to saturate to, and is in the range 1 to 16 for SSAT16, or 0 to 15 for USAT16.

Rm

is the register holding the operand.

Do not use r15 for Rd or Rm.

Operation

Halfword-wise signed and unsigned saturation to any bit position.

The SSAT16 instruction saturates each halfword to the signed range –2sat –1 = x = 2sat – 1 –1.

The USAT16 instruction saturates each halfword to the unsigned range 0 = x = 2sat –1.

Condition flags

If saturation occurs on either halfword, these instructions set the Q flag. To read the state of the Q flag, use an MRS instruction (see MRS).

Architectures

These ARM instructions are available in ARMv6 and above.

These 32-bit Thumb-2 instructions are available in T2 variants of ARMv6 and above.

There are no 16-bit Thumb versions of these instructions.

Examples

    SSAT16  r7, #12, r7
    USAT16  r0, #7, r5

Incorrect examples

    SSAT16  r1, #16, r2, LSL #4 ; shifts not permitted with halfword saturations
    USAT16  r0, #11, r15        ; use of r15 not permitted
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