4.10.4. MSR

Load specified fields of the CPSR or SPSR with an immediate constant, or from the contents of a general-purpose register.

Syntax

MSR{cond} <psr>_<fields>, #constant
MSR{cond} <psr>_<fields>, Rm

where:

cond

is an optional condition code (see Conditional execution).

<psr>

is either CPSR or SPSR.

<fields>

specifies the Program Status Register (PSR) field or fields to be moved. <fields> can be one or more of:

c

control field mask byte, PSR[7:0]

x

extension field mask byte, PSR[15:8]

s

status field mask byte, PSR[23:16]

f

flags field mask byte, PSR[31:24].

constant

is an expression evaluating to a numeric constant. The constant must correspond to an 8-bit pattern rotated by an even number of bits within a 32-bit word.

Note

The #constant form of this instruction is not available in Thumb-2.

Rm

is the source register.

Usage

See MRS.

In User mode:

  • Writes to unallocated, privileged or execution state bits in the CPSR are ignored. This ensures that User mode programs cannot change to a privileged mode.

  • Writes to the state bits in the CPSR (defined by StateMask) are ignored in Thumb-2. Previously the behavior was unpredictable, that is, it could not be relied upon.

If you access the SPSR when in User or System mode, the result is unpredictable, that is, it cannot be relied upon.

Condition flags

This instruction updates the flags explicitly if the f field is specified.

Architectures

This ARM instruction is available in ARMv3 and above.

This 32-bit Thumb-2 instruction is available in T2 variants of ARMv6 and above.

There is no 16-bit Thumb version of this instruction.

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