4.1. Instruction summary

Table 4.1 gives an overview of the instructions available in the ARM, Thumb, and Thumb-2 instruction sets. Use it to locate individual instructions and pseudo-instructions described in the rest of this chapter.

The § column in Table 4.1 shows the ARM architecture that each instruction first appeared in. 6T2 indicates that an instruction first appeared in 6T2, but is available in the ARM instruction set as well as the Thumb-2 instruction set. T2 indicates that the instruction is only available in the Thumb-2 instruction set. XScale indicates that the instruction is available only on XScale processors.

Table 4.1. Location of instructions

MnemonicBrief descriptionPage§
ADC, ADDAdd with Carry, AddADD, SUB, RSB, ADC, SBC, and RSCAll
ADR pseudo-instructionLoad program or register-relative address (short range)ADR pseudo-instructionAll
ADRL pseudo-instructionLoad program or register-relative address (medium range)ADRL pseudo-instructionAll
ANDLogical ANDAND, ORR, EOR, BIC, and ORNAll
ASRArithmetic Shift RightASR, LSL, LSR, ROR, and RRXAll
BBranchB, BL, BX, BLX, and BXJAll
BFC, BFIBit Field Clear and InsertBFC and BFI6T2
BICBit ClearAND, ORR, EOR, BIC, and ORNAll
BKPTBreakpointBKPT5
BLBranch with LinkB, BL, BX, BLX, and BXJAll
CDP, CDP2Coprocessor Data Processing operationCDP and CDP2All, 5
CLREXClear ExclusiveCLREXT2
CLZCount leading zerosCLZ5
CMN, CMPCompare Negative, CompareCMP and CMNAll
CPSChange Processor StateCPS6
CPYCopyMOV and MVN6
CBZ, CBNZCompare and Branch if {Non}ZeroCBZ and CBNZT2
EORExclusive ORAND, ORR, EOR, BIC, and ORNAll
ITIf-ThenITT2
LDC, LDC2Load CoprocessorLDC and STCAll, 5
LDMLoad Multiple registersLDM and STMAll
LDRLoad Register instructionsMemory access instructionsAll
LDR pseudo-instructionLoad Register pseudo-instructionLDR pseudo-instructionAll
LDREXLoad Register ExclusiveLDREX and STREX6
LSL, LSRLogical Shift Left, Logical Shift RightASR, LSL, LSR, ROR, and RRXAll
MARMove from Registers to 40-bit AccumulatorMAR and MRAXScale
MCR, MCR2, MCRR, MCRR2Move from Register(s) to CoprocessorMCR, MCR2, MCRR, and MCRR2All, 5, 5E, 6
MIA, MIAPH, MIAxyMultiply with Internal 40-bit AccumulateMIA, MIAPH, and MIAxyXScale
MLA, MLSMultiply Accumulate, Multiply and SubtractMUL, MLA, and MLSAll, 6T2
MOVMoveMOV and MVNAll
MOVTMove TopMOVT6T2
MOV32 pseudo-instructionMove 32-bit constant to registerMOV32 pseudo-instructionT2
MRAMove from 40-bit Accumulator to RegistersMAR and MRAXScale
MRC, MRC2Move from Coprocessor to RegisterMRC, MRC2, MRRC and MRRC2All, 5
MRSMove from PSR to registerMRSAll
MSRMove from register to PSRMSRAll
MULMultiplyMUL, MLA, and MLSAll
MVNMove NotMOV and MVNAll
NOPNo OperationNOP, SEV, WFE, WFI, and YIELDAll
ORNLogical OR NOTAND, ORR, EOR, BIC, and ORNT2
ORRLogical ORAND, ORR, EOR, BIC, and ORNAll
PKHBT, PKHTBPack HalfwordsPKHBT and PKHTB6
PUSH, POPPUSH, POP registersPUSH and POPAll T
QADD, QDADD, QDSUB, QSUBSaturating ArithmeticQADD, QSUB, QDADD, and QDSUB5ExP
QADD8, QADD16, QASX, QSUB8, QSUB16, QSAXParallel signed Saturating ArithmeticParallel add and subtract6
REV, REV16, REVSH, RBITReverse byte order, Reverse BitsREV, REV16, REVSH, and RBIT6, 6T2
RFEReturn From ExceptionRFE6T2
RORRotate Right RegisterASR, LSL, LSR, ROR, and RRXAll
RSB, RSC, SBCReverse Sub, Reverse Sub with Carry, Sub with CarryADD, SUB, RSB, ADC, SBC, and RSCAll
SADD8, SADD16, SASXParallel signed arithmeticParallel add and subtract6
SBFX, UBFXSigned, Unsigned Bit Field extractSBFX and UBFX6T2
SELSelect bytes according to CPSR GE flagsSEL6
SEVSet EventNOP, SEV, WFE, WFI, and YIELDK
SETENDSet Endianness for memory accessesSETEND6
SHADD8, SHADD16, SHASX, SHSUB8, SHSUB16, SHSAXParallel signed Halving arithmeticParallel add and subtract6
SMISecure Monitor InterruptSMIZ
SMLADDual Signed Multiply Accumulate (32 <= 32 + 16 x 16 + 16 x 16)SMLAD and SMLSD6
SMLALSigned Multiply Accumulate (64 <= 64 + 32 x 32)UMULL, UMLAL, SMULL, and SMLALM
SMLALxySigned Multiply Accumulate (64 <= 64 + 16 x 16) SMLALxy5ExP
SMLALDDual Signed Multiply Accumulate LongSMLALD and SMLSLD6
 (64 <= 64 + 16 x 16 + 16 x 16)  
SMLSDDual Signed Multiply Subtract AccumulateSMLAD and SMLSD6
 (32 <= 32 + 16 x 16 – 16 x 16)  
SMLSLDDual Signed Multiply Subtract Accumulate LongSMLALD and SMLSLD6
 (64 <= 64 + 16 x 16 – 16 x 16)  
SMMULSigned top word Multiply (32 <= TopWord(32 x 32))SMMUL, SMMLA, and SMMLS6
SMUAD, SMUSDDual Signed Multiply, and Add or Subtract productsSMUAD{X} and SMUSD{X}6
SMULLSigned Multiply (64 <= 32 x 32)UMULL, UMLAL, SMULL, and SMLALM
SMULxySigned Multiply (32 <= 16 x 16)SMULxy and SMLAxy5ExP
SMULWySigned Multiply (32 <= 32 x 16)SMULWy and SMLAWy5ExP
SRSStore Return StateSRS6T2
SSATSigned SaturateSSAT and USAT6
SSAT16Signed Saturate, parallel halfwordsSSAT16 and USAT166
SSUB8, SSUB16, SSAXParallel signed arithmeticParallel add and subtract6
STCStore CoprocessorLDC and STCAll
STC2Store CoprocessorLDC2 and STC25ExP
STMStore Multiple registersLDM and STMAll
STRStore Register instructionsMemory access instructionsAll
STREXStore Register ExclusiveLDREX and STREX6
SUBSubtractADD, SUB, RSB, ADC, SBC, and RSCAll
SUBS PC, LRException return, no stackSUBS PC, LR (Thumb-2 only)T2
SWISoftware InterruptSWIAll
SWP, SWPBSwap registers and memory (ARM only)SWP and SWPBAll
SXT, SXTASigned extend, with optional AdditionSXT, SXTA, UXT, and UXTA6
TBB, TBHTable Branch Byte, HalfwordTBB and TBHT2
TEQ, TSTTest Equivalence, TestTST and TEQAll
UADD8, UADD16, UASXParallel Unsigned ArithmeticParallel add and subtract6
UHADD8, UHADD16, UHASX, UHSUB8, UHSUB16, UHSAXParallel Unsigned Halving ArithmeticParallel add and subtract6
UMAALUnsigned Multiply Accumulate Accumulate LongUMAAL6
 (64 <= 32 + 32 + 32 x 32)  
UMLAL, UMULLUnsigned Multiply Accumulate, MultiplyUMULL, UMLAL, SMULL, and SMLALM
 (64 <= 32 x 32 + 64), (64 <= 32 x 32)  
UQADD8, UQADD16, UQASX, UQSUB8, UQSUB16, UQSAXParallel Unsigned Saturating ArithmeticParallel add and subtract6
USAD8Unsigned Sum of Absolute DifferencesUSAD8 and USADA86
USADA8Accumulate Unsigned Sum of Absolute DifferencesUSAD8 and USADA86
USATUnsigned SaturateSSAT and USAT6
USAT16Unsigned Saturate, parallel halfwordsSSAT16 and USAT166
USUB8, USUB16, USAXParallel unsigned arithmeticParallel add and subtract6
UXT, UXTAUnsigned extend, with optional AdditionSXT, SXTA, UXT, and UXTA6
WFE, WFI, YIELDWait For Event, Wait For Interrupt, YieldNOP, SEV, WFE, WFI, and YIELD6T2
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