4.8.3. TBB and TBH

Table Branch Byte and Table Branch Halfword.

Syntax

TBB [Rn, Rm]
TBH [Rn, Rm, LSL #1]

where:

Rn

is the base register. This contains the address of the table of branch lengths.

Rn can be r15 in this instruction. The value used is the address of the current instruction +4.

Rm

is the index register. This contains an integer pointing to a single byte within the table. The offset within the table depends on the instruction:

TBB

the value of the index

TBH

twice the value of the index.

Operation

These instructions cause a PC-relative forward branch using a table of single byte offsets (TBB) or halfword offsets (TBH). Rn provides a pointer to the table, and Rm supplies an index into the table. The branch length is twice the value of the byte (TBB) or the halfword (TBH) returned from the table.

Notes

If r15 is specified for Rn, the value used is the address of the instruction plus 4.

Exceptions

Data abort.

Architectures

These 32-bit Thumb-2 instructions are available in T2 variants of ARMv6 and above.

There are no ARM, or 16-bit Thumb, versions of these instructions.

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