RealView® Compilation Tools Assembler Guide 5.17.6. FDIV

Floating-point divide.

FDIV can be scalar, vector, or mixed (see VFP vector and scalar operations).

FDIV<precision>{cond} Fd, Fn, Fm

where:

<precision>: must be either S for single-precision, or D for double-precision.
cond: is an optional condition code (see Condition codes).
Fd: is the VFP register for the result.
Fn: is the VFP register holding the first operand.
Fm: is the VFP register holding the second operand.

The precision of Fd, Fn and Fm must match the precision specified in <precision>.

The FDIV instruction divides the value in Fn by the value in Fm and places the result in Fd.

FDIV operations can produce Division by Zero, Invalid Operation, Overflow, Underflow, or Inexact exceptions.

    FDIVS       s8, s0, s12

    FDIVSNE     s2, s27, s28

    FDIVD       d10, d2, d10

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