four banks of eight single-precision registers, s0 to s7, s8 to s15, s16 to s23, and s24 to s31

eight (four in VFPv2) banks of four double-precision registers, d0 to d3, d4 to d7, d8 to d11, d12 to d15, d16 to d19, d20 to d23, d24 to d27, and d28 to d31

any combination of single-precision and double-precision registers.