RealView® Compilation Tools Assembler Guide 5.10.3. VLDn and VSTn (single n-element structure to one lane)

5.10.3. VLD`n` and VST`n` (single `n`-element structure to one lane)

Vector Load single n-element structure to one lane loads one n-element structure from memory into one or more NEON registers. Elements of the register that are not loaded are unaltered.

Syntax

Vopn{cond}.datatype list, [Rn{@align}]{!}

Vopn{cond}.datatype list, [Rn{@align}], Rm

where:

op: must be either LD or ST.
n: must be one of 1, 2, 3, or 4.
cond: is an optional condition code (see Condition codes).
datatype: see Table 5.9.
list: specifies the NEON register list. See Table 5.9 for options.
Rn: is the ARM register containing the base address. Rn cannot be R15.
align: specifies an optional alignment. See Table 5.9 for options.
!: if ! is present, Rn is updated to (Rn + the number of bytes transferred by the instruction).
Rm: is an ARM register containing an offset from the base address. If Rm is present, Rn is updated to (Rn + Rm) after the address is used to access memory. Rm cannot be R13 or R15.

Table 5.9. Permitted combinations of parameters

`n`	`datatype`	list ^[1]	`align` ^[2]	alignment
1	`8`	`{Dd[x]}`	-	Standard only
	`16`	`{Dd[x]}`	`@16`	2-byte
	`32`	`{Dd[x]}`	`@32`	4-byte
2	`8`	`{Dd[x], D(d+1)[x]}`	`@16`	2-byte
	`16`	`{Dd[x], D(d+1)[x]}`	`@32`	4-byte
		`{Dd[x], D(d+2)[x]}`	`@32`	4-byte
	`32`	`{Dd[x], D(d+1)[x]}`	`@64`	8-byte
		`{Dd[x], D(d+2)[x]}`	`@64`	8-byte
3	`8`, `16`, or `32`	`{Dd[x], D(d+1)[x], D(d+2)[x]}`	-	Standard only
		`{Dd[x], D(d+2)[x], D(d+4)[x]}`	-	Standard only
4	`8`	`{Dd[x], D(d+1)[x], D(d+2)[x], D(d+3)[x]}`	`@32`	4-byte
		`{Dd[x], D(d+2)[x], D(d+4)[x], D(d+6)[x]}`	`@32`	4-byte
	16	`{Dd[x], D(d+1)[x], D(d+2)[x], D(d+3)[x]}`	`@64`	8-byte
		`{Dd[x], D(d+2)[x], D(d+4)[x], D(d+6)[x]}`	`@64`	8-byte
	32	`{Dd[x], D(d+1)[x], D(d+2)[x], D(d+3)[x]}`	`@64` or `@128`	8-byte or 16-byte
		`{Dd[x], D(d+2)[x], D(d+4)[x], D(d+6)[x]}`	`@64` or `@128`	8-byte or 16-byte
^[1]Every register in the list must be in the range D0-D31. ^[2]`Align` can be omitted. In this case, standard alignment rules apply, see Alignment restrictions in load / store element and structure instructions.

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