RealView® Compilation Tools Assembler Guide 4.3.14. SDIV and UDIV

RealView^® Compilation Tools Assembler Guide

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4.3.14. SDIV and UDIV

Signed and Unsigned Divide.

Syntax

SDIV{cond} Rd, Rn, Rm

UDIV{cond} Rd, Rn, Rm

where:

cond: is an optional condition code (see Conditional execution).
Rd: is the destination register.
Rn: is the register holding the value to be divided.
Rm: is a register holding the divisor.

Architectures

The SDIV and UDIV 16-bit Thumb-2 instructions are available in ARMv7-M only.

There are no 32-bit SDIV and UDIV instructions.

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