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| Home > ARM and Thumb Instructions > Pseudo‑instructions > ADRL pseudo‑instruction | |||
Load a program-relative or register-relative address into
a register. It is similar to the ADR instruction. ADRL can
load a wider range of addresses than ADR because it
generates two data processing instructions.
ADRL is not available when assembling Thumb instructions for
processors before ARMv6T2.
ADRL{cond}Rd,label
where:
condis an optional condition code (see Conditional execution).
Rdis the register to load.
labelis a program-relative or register-relative expression. See Register‑relative and program‑relative expressions for more information.
ADRL always assembles to two 32-bit instructions.
Even if the address can be reached in a single instruction, a second,
redundant instruction is produced.
If the assembler cannot construct the address in two instructions, it generates an error message and the assembly fails. See LDR pseudo‑instruction for information on loading a wider range of addresses (see also Loading constants into registers).
ADRL produces position-independent code, because
the address is program-relative or register-relative.
If is
program-relative, it must evaluate to an address in the same assembler
area as the labelADRL pseudo-instruction, see AREA.
If you use ADRL to generate a target for a BX or BLX instruction,
it is your responsibility to set the Thumb bit (bit 0) of the address
if the target contains Thumb instructions.
The available range depends on the instruction set in use:
±64KB to a byte or halfword-aligned address.
±256KB bytes to a word-aligned address.
±1MB bytes to a byte, halfword, or word-aligned address.
ADRL is
not available.
The given range is relative to a point four bytes (in Thumb code) or two words (in ARM code) after the address of the current instruction. In ARM and 32-bit Thumb, more distant addresses can be in range if the alignment is 16-bytes or more relative to this point.