6.3.1. Pseudo-instructions

Table 6.3 gives an overview of the Wireless MMX Technology pseudo-instructions. Use it to locate instructions described in the Wireless MMX Technology Developer Guide and in Chapter 4 ARM and Thumb Instructions.

Table 6.3. Wireless MMX Technology pseudo-instructions

MnemonicBrief descriptionExample
TMCRMoves the contents of source register, Rn, to Control register, wCn. Maps onto the ARM MCR coprocessor instruction (MCR, MCR2, MCRR, and MCRR2).
TMCR    wc1, r10
TMCRRMoves the contents of two source registers, RnLo and RnHi, to destination register, wRd. Do not use r15 for either RnLo or RnHi. Maps onto the ARM MCRR coprocessor instruction (MCR, MCR2, MCRR, and MCRR2).
TMCRR   wr4, r5, r6
TMRCMoves the contents of Control register, wCn, to destination register, Rd. Do not use r15 for Rd. Maps onto the ARM MRC coprocessor instruction (MRC, MRC2, MRRC and MRRC2).
TMRC    r1, wc2
TMRRCMoves the contents of source register, wRn, to two destination registers, RdLo and RdHi. Do not use r15 for either destination register. RdLo and RdHi must be distinct registers, otherwise the result is unpredictable. Maps onto the ARM MRRC coprocessor instruction (MRC, MRC2, MRRC and MRRC2).
TMRRC    r1, r0, wr2
WMOVMoves the contents of source register, wRn, to destination register, wRd. This instruction is a form of WOR (see Table 6.2).
WMOV    wr1, wr8 
WZEROZeros destination register, wRd. This instruction is a form of WANDN (see Table 6.2).
WZERO   wr1 

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