4.13.3. LDR pseudo-instruction

Load a register with either:

Note

This section describes the LDR pseudo-instruction only. See Memory access instructions for information on the LDR instruction.

Syntax

LDR{cond}{.W} Rt, =expr
LDR{cond}{.W} Rt, =label_expr

where:

cond

is an optional condition code (see Conditional execution).

.W

is an optional instruction width specifier.

Rt

is the register to be loaded.

expr

evaluates to a numeric constant (see Numeric constants):

  • The assembler generates a MOV or MVN instruction, if the value of expr is within range.

  • If the value of expr is not within range of a MOV or MVN instruction, the assembler places the constant in a literal pool and generates a program-relative LDR instruction that reads the constant from the literal pool.

See Loading with LDR Rd, =const, for information on loading constants.

label_expr

is a program-relative or external expression of an address in the form of a label plus or minus a numeric constant (see Register‑relative and program‑relative expressions for more information). The assembler places the value of label_expr in a literal pool and generates a program-relative LDR instruction that loads the value from the literal pool.

If label_expr is an external expression, or is not contained in the current section, the assembler places a linker relocation directive in the object file. The linker generates the address at link time.

If label_expr is a local label (see Local labels), the assembler places a linker relocation directive in the object file and generates a symbol for that local label. The address is generated at link time. If the local label references Thumb code, the Thumb bit (bit 0) of the address is set.

Note

In RVCT v2.2, the Thumb bit of the address was not set. If you have code that relies on this behavior, use the command line option --untyped_local_labels to force the assembler not to set the Thumb bit when referencing labels in Thumb code.

Usage

The main purposes of the LDR pseudo-instruction are:

  • To generate literal constants when an immediate value cannot be moved into a register because it is out of range of the MOV and MVN instructions

  • To load a program-relative or external address into a register. The address remains valid regardless of where the linker places the ELF section containing the LDR.

    Note

    An address loaded in this way is fixed at link time, so the code is not position-independent.

The offset from the pc to the value in the literal pool must be less than ±4KB (ARM, 32-bit Thumb-2) or in the range 0 to +1KB (16-bit Thumb-2, pre-Thumb2 Thumb). You are responsible for ensuring that there is a literal pool within range. See LTORG for more information.

If the label referenced is in Thumb code, the LDR pseudo-instruction sets the Thumb bit (bit 0) of label_expr.

See Loading constants into registers for a more detailed explanation of how to use LDR, and for more information on MOV and MVN.

LDR in Thumb code

You can use the .W width specifier to force LDR to generate a 32-bit instruction in Thumb code on ARMv6T2 and later processors. LDR.W always generates a 32-bit instruction, even if the constant could be loaded in a 16-bit MOV, or there is a literal pool within reach of a 16-bit pc-relative load.

If the value of the constant is not known in the first pass of the assembler, LDR without .W generates a 16-bit instruction in Thumb code, even if that results in a 16-bit pc-relative load for a constant that could be generated in a 32-bit MOV or MVN instruction. However, if the constant is known in the first pass, and it can be generated using a 32-bit MOV or MVN instruction, the MOV or MVN instruction is used.

The LDR pseudo-instruction never generates a 16-bit flag-setting MOV instruction. Use the --diag_warning 1727 assembler command-line option to check when a 16-bit instruction could have been used.

See MOV32 pseudo‑instruction for generating constants or addresses without loading from a literal pool.

Examples

        LDR     r3,=0xff0    ; loads 0xff0 into r3
                             ; =>  MOV.W r3,#0xff0
        LDR     r1,=0xfff    ; loads 0xfff into r1
                             ; =>  LDR r1,[pc,offset_to_litpool]
                             ;     ...
                             ;     litpool DCD 0xfff
        LDR     r2,=place    ; loads the address of
                             ; place into r2
                             ; =>  LDR r2,[pc,offset_to_litpool]
                             ;     ...
                             ;     litpool DCD place
Copyright © 2002-2010 ARM. All rights reserved.ARM DUI 0204J
Non-ConfidentialID101213