4.2.6. ADR

ADR adds an immediate value to the pc value, and writes the result to the destination register.

Syntax

ADR{cond}{.W} Rd,label

where:

cond

is an optional condition code (see Conditional execution).

.W

is an optional instruction width specifier. See ADR in Thumb‑2 for details.

Rd

is the register to load.

label

is a program-relative expression. See Register‑relative and program‑relative expressions for more information.

label must be within a limited distance of the current instruction. See Offset range and architectures for details.

Usage

ADR produces position-independent code, because the address is program-relative or register-relative.

Use the ADRL pseudo-instruction to assemble a wider range of effective addresses (see ADRL pseudo‑instruction).

If label is program-relative, it must evaluate to an address in the same assembler area as the ADR instruction, see AREA.

If you use ADR to generate a target for a BX or BLX instruction, it is your responsibility to set the Thumb bit (bit 0) of the address if the target contains Thumb instructions.

Offset range and architectures

The assembler calculates the offset from the pc for you. The assembler generates an error if label is out of range.

Table 4.5 shows the possible offsets between label and the current instruction.

Table 4.6. pc-relative offsets

InstructionOffset rangeArchitectures
ARM ADRSee Constants in Operand2All
32-bit Thumb ADR+/- 4095v6T2, v7
16-bit Thumb ADR [a]0-1020 [b]All T

[a] Rd must be in the range r0-r7.

[b] Must be a multiple of 4.


ADR in Thumb-2

You can use the .W width specifier to force ADR to generate a 32-bit instruction in Thumb-2 code. ADR with .W always generates a 32-bit instruction, even if the address can be generated in a 16-bit instruction.

For forward references, ADR without .W always generates a 16-bit instruction in Thumb code, even if that results in failure for an address that could be generated in a 32-bit Thumb-2 ADD instruction.

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