### 5.16.1. VABS, VNEG, and VSQRT

Floating-point absolute value, negate, and square root.

These instructions can be scalar, vector, or mixed (see *VFP vector and scalar operations*).

V`op`

{`cond`

}.F32 `Sd`

, `Sm`

V`op`

{`cond`

}.F64 `Dd`

, `Dm`

where:

`op`

is one of `ABS`

, `NEG`

, or `SQRT`

.

`cond`

`Sd`

, `Sm`

are the single-precision registers for the result
and operand.

`Dd`

, `Dm`

are the double-precision registers for the result
and operand.

The `VABS`

instruction takes the contents of `Sm`

or `Dm`

,
clears the sign bit, and places the result in `Sd`

or `Dd`

.
This gives the absolute value.

The `VNEG`

instruction takes the contents of `Sm`

or `Dm`

,
changes the sign bit, and places the result in `Sd`

or `Dd`

.
This gives the negation of the value.

The `VSQRT`

instruction takes the square root of
the contents of `Sm`

or `Dm`

,
and places the result in `Sd`

or `Dd`

.

In the case of a `VABS`

and `VNEG`

instruction,
if the operand is a NaN, the sign bit is determined in each case
as above, but no exception is produced.

#### Floating-point exceptions

`VABS`

and `VNEG`

instructions cannot
produce any exceptions.

`VSQRT`

instructions can produce Invalid Operation
or Inexact exceptions.