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Home > NEON and VFP Programming > NEON general arithmetic instructions > V{R}HADD and VHSUB |

`VHADD`

(Vector Halving Add) adds corresponding
elements in two vectors, shifts each result right one bit, and places
the results in the destination vector. Results can be either rounded
or truncated.

`VHSUB`

(Vector Halving Subtract) subtracts the
elements of one vector from the corresponding elements of another
vector, shifts each result right one bit, and places the results
in the destination vector. Results are always truncated.

V{R}HADD{}.`cond`

{`datatype`

},`Qd`

,`Qn`

`Qm`

V{R}HADD{}.`cond`

{`datatype`

},`Dd`

,`Dn`

`Dm`

VHSUB{}.`cond`

{`datatype`

},`Qd`

,`Qn`

`Qm`

VHSUB{}.`cond`

{`datatype`

},`Dd`

,`Dn`

`Dm`

where:

`R`

if present, indicates that each result is rounded. Otherwise, each result is truncated.

`cond`

is an optional condition code (see

*Condition codes*).`datatype`

must be one of

`S8`

,`S16`

,`S32`

,`U8`

,`U16`

, or`U32`

.,`Qd`

,`Qn`

`Qm`

are the destination vector, the first operand vector, and the second operand vector, for a quadword operation.

,`Dd`

,`Dn`

`Dm`

are the destination vector, the first operand vector, and the second operand vector, for a doubleword operation.