5.17. VFP vector mode

Most arithmetic instructions can be used on vectors, enabling Single Instruction Multiple Data (SIMD) parallelism. In addition, the floating-point load and store instructions have multiple register forms, enabling vectors to be transferred to and from memory.

For more details of the VFP coprocessor, see the ARM Architecture Reference Manual.

Note

The use of VFP vector mode is deprecated.

Copyright © 2002-2010 ARM. All rights reserved.ARM DUI 0204J
Non-ConfidentialID101213