5.13.6. VCLE and VCLT

Vector Compare takes the value of each element in a vector, and compares it with the value of the corresponding element of a second vector, or zero. If the condition is true, the corresponding element in the destination vector is set to all ones. Otherwise, it is set to all zeros.


On disassembly, these pseudo-instructions are disassembled to the corresponding VCGE and VCGT instructions, with the operands reversed.


VCop{cond}.datatype {Qd}, Qn, Qm
VCop{cond}.datatype {Dd}, Dn, Dm



must be one of:


Less than or Equal


Less Than.


is an optional condition code (see Condition codes).


must be one of S8, S16, S32, U8, U16, U32, or F32.

Qd or Dd

is the NEON register for the result.

The result datatype is:

  • I32 for operand datatypes I32, S32, U32, or F32

  • I16 for operand datatypes I16, S16, or U16

  • I8 for operand datatypes I8, S8, or U8.

Qn or Dn

is the NEON register holding the first operand.

Qm or Dm

is the NEON register holding the second operand.

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