5.17.4. VFP directives and vector notation

This section applies only to armasm. The inline assemblers in the C and C++ compilers do not accept these directives or vector notation.

The use of VFP vector mode is deprecated, and vector notation is not supported in UAL. To use vector notation, you must use the pre-UAL VFP mnemonics. See Pre-UAL VFP mnemonics for details. You can mix pre-UAL VFP mnemonics and UAL VFP mnemonics.

You can make assertions about VFP vector lengths and strides in your code, and have them checked by the assembler. See:

If you use VFPASSERT directives, you must specify vector details in all VFP data processing instructions written using pre-UAL mnemonics. The vector notation is described in Vector notation. If you do not use VFPASSERT directives you must not use this notation.

Pre-UAL VFP mnemonics

Where UAL mnemonics use .F32 to specify single-precision data, pre-UAL mnemonics use S appended to the instruction mnemonic. For example, VABS.32 was FABSS.

Where UAL mnemonics use .F64 to specify double-precision data, pre-UAL mnemonics use D appended to the instruction mnemonic. For example, VCMPE.64 was FCMPED.

Table 5.15 shows the pre-UAL mnemonics of those instructions that are affected by VFP vector mode. All other VFP instructions are always scalar regardless of the settings of LEN and STRIDE.

Table 5.15. Pre-UAL VFP mnemonics

UAL mnemonicEquivalent pre-UAL mnemonic
VABSFABS
VADDFADD
VDIVFDIV
VMLAFMAC
VMLSFNMAC
VMOV (immediate)FCONST [a]
VMOV (register)FCPY
VMULFMUL
VNEGFNEG
VNMLAFNMSC
VNMLSFMSC
VNMULFNMUL
VSQRTFSQRT
VSUBFSUB

[a] The immediate in VMOV (immediate) is the floating-point number you want to load. The immediate in FCONST is the number encoded in the instruction to produce the floating-point number you want to load. See Immediate values in FCONST for details.


Immediate values in FCONST

Table 5.16 shows the floating-point constants you can load using FCONST. Trailing zeroes are omitted for clarity. The immediate value you must put in the FCONST instruction is the decimal represenation of the binary number abcdefgh, where:

a

is 0 for positive numbers, or 1 for negative numbers

bcd

is shown in the column headings

efgh

is shown in the row headings.

Alternatively, you can use 0x followed by the hexadecimal representation.

Table 5.16. Floating-point constant values

 bcd000001010011100101110111
efgh         
0000 2.04.08.016.00.1250.250.51.0
0001 2.1254.258.517.00.13281250.2656250.531251.0625
0010 2.254.59.018.00.1406250.281250.56251.125
0011 2.3754.759.519.00.14843750.2968750.593751.1875
0100 2.55.010.020.00.156250.31250.6251.25
0101 2.6255.2510.521.00.16406250.3281250.656251.3125
0110 2.755.511.022.00.1718750.343750.68751.375
0111 2.8755.7511.523.00.17968750.3593750.718751.4375
1000 3.06.012.024.00.18750.3750.751.5
1001 3.1256.2512.525.00.19531250.3906250.781251.5625
1010 3.256.513.026.00.2031250.406250.81251.625
1011 3.3756.7513.527.00.21093750.4218750.843751.6875
1100 3.57.014.028.00.218750.43750.8751.75
1101 3.6257.2514.529.00.22656250.4531250.906251.8125
1110 3.757.515.030.00.2343750.468750.93751.875
1111 3.8757.7515.531.00.24218750.4843750.968751.9375

Vector notation

In pre-UAL VFP data processing instructions, specify vectors of VFP registers using angle brackets:

  • sn is a single-precision scalar register n

  • sn <> is a single-precision vector whose length and stride are given by the current vector length and stride, starting at register n

  • sn <L> is a single-precision vector of length L, stride 1, starting at register n

  • sn <L:S> is a single-precision vector of length L, stride S, starting at register n

  • dn is a double-precision scalar register n

  • dn <> is a double-precision vector whose length and stride are given by the current vector length and stride, starting at register n

  • dn <L> is a double-precision vector of length L, stride 1, starting at register n

  • dn <L:S> is a double-precision vector of length L, stride S, starting at register n.

You can use this vector notation with names defined using the DN and SN directives (see QN, DN, and SN).

You must not use this vector notation in the DN and SN directives themselves.

VFPASSERT SCALAR

The VFPASSERT SCALAR directive informs the assembler that following VFP instructions are in scalar mode.

Syntax
VFPASSERT SCALAR
Usage

Use the VFPASSERT SCALAR directive to mark the end of any block of code where the VFP mode is VECTOR.

Place the VFPASSERT SCALAR directive immediately after the instruction where the change occurs. This is usually an FMXR instruction, but might be a BL instruction.

If a function expects the VFP to be in vector mode on exit, place a VFPASSERT SCALAR directive immediately after the last instruction. Such a function would not be AAPCS conformant. See the Procedure Call Standard for the ARM Architecture specification, aapcs.pdf, in install_directory\Documentation\Specifications\... for more information.

See also:

Note

This directive does not generate any code. It is only an assertion by the programmer. The assembler produces error messages if any such assertions are inconsistent with each other, or with any vector notation in VFP data processing instructions.

The assembler faults vector notation in VFP data processing instructions following a VFPASSERT SCALAR directive, even if the vector length is 1.

Example
    VFPASSERT   SCALAR            ; scalar mode
    faddd       d4, d4, d0        ; okay
    fadds       s4<3>, s0, s8<3>  ; ERROR, vector in scalar mode
    fabss       s24<1>, s28<1>    ; ERROR, vector in scalar mode
                                  ; (even though length==1)

VFPASSERT VECTOR

The VFPASSERT VECTOR directive informs the assembler that following VFP instructions are in vector mode. It can also specify the length and stride of the vectors.

Syntax
VFPASSERT VECTOR[<[n[:s]]>]

where:

n

is the vector length, 1-8.

s

is the vector stride, 1-2.

Usage

Use the VFPASSERT VECTOR directive to mark the start of a block of instructions where the VFP mode is VECTOR, and to mark changes in the length or stride of vectors.

Place the VFPASSERT VECTOR directive immediately after the instruction where the change occurs. This is usually an FMXR instruction, but might be a BL instruction.

If a function expects the VFP to be in vector mode on entry, place a VFPASSERT VECTOR directive immediately before the first instruction. Such a function would not be AAPCS conformant. See the Procedure Call Standard for the ARM Architecture specification, aapcs.pdf, in install_directory\Documentation\Specifications\... for more information.

See:

Note

This directive does not generate any code. It is only an assertion by the programmer. The assembler produces error messages if any such assertions are inconsistent with each other, or with any vector notation in VFP data processing instructions.

Example
    VMRS    r10,FPSCR          ; UAL mnemonic - could be FMRX instead.
    BIC     r10,r10,#0x00370000
    ORR     r10,r10,#0x00020000    ; set length = 3, stride = 1
    VMSR    FPSCR,r10
    VFPASSERT VECTOR           ; assert vector mode, unspecified length & stride
    faddd  d4, d4, d0          ; ERROR, scalar in vector mode
    fadds  s16<3>, s0, s8<3>   ; okay
    fabss  s24<1>, s28<1>      ; wrong length, but not faulted (unspecified)
    VMRS    r10,FPSCR
    BIC     r10,r10,#0x00370000
    ORR     r10,r10,#0x00030000    ; set length = 4, stride = 1
    VMSR    FPSCR,r10
    VFPASSERT VECTOR<4>        ; assert vector mode, length 4, stride 1
    fadds  s24<4>, s0, s8<4>   ; okay
    fabss  s24<2>, s24<2>      ; ERROR, wrong length
    VMRS    r10,FPSCR
    BIC     r10,r10,#0x00370000
    ORR     r10,r10,#0x00130000    ; set length = 4, stride = 2
    VMSR    FPSCR,r10
    VFPASSERT VECTOR<4:2>      ; assert vector mode, length 4, stride 2
    fadds  s8<4>, s0, s16<4>   ; ERROR, wrong stride
    fabss  s16<4:2>, s28<4:2>  ; okay
    fadds  s8<>, s2, s16<>     ; okay (s8 and s16 both have
                               ; length 4 and stride 2.
                               ; s2 is scalar.)
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