5.17.3. VFP vector and scalar operations

You can use VFP arithmetic instructions to operate:

Use the LEN bits in the FPSCR to control the length of vectors (see FPSCR, the floating‑point status and control register).

When LEN is 1 all operations are scalar.

Vectors can have a stride of 1 or 2, controlled by the STRIDE bits in the FPSCR. When STRIDE is 1, the elements of the vector occupy consecutive registers in the bank. When STRIDE is 2, the elements of the vector occupy alternate registers in the bank.

Control of scalar, vector, and mixed operations

When LEN is greater than 1, the behavior of arithmetic operations depends on which register bank the destination and operand registers are in (see Register banks).

Given instructions of the following general forms:

    Op  Fd,Fn,Fm
    Op  Fd,Fm

the behavior is as follows:

  • If Fd is in the first or fifth bank of registers, s0 to s7, d0 to d3, or d16 to d19, the operation is scalar.

  • If the Fm is in the first or fifth bank of registers, but Fd is not, the operation is mixed.

  • If neither Fd nor Fm are in the first or fifth bank of registers, the operation is vector.

Scalar operations

Op acts on the value in Fm, and the value in Fn if present. The result is placed in Fd.

Vector operations

Op acts on the values in the vector starting at Fm, together with the values in the vector starting at Fn if present. The results are placed in the vector starting at Fd.

Mixed scalar and vector operations

For single-operand instructions, Op acts on the single value in Fm. LEN copies of the result are placed in the vector starting at Fd.

For multiple-operand instructions, Op acts on the single value in Fm, together with the values in the vector starting at Fn. The results are placed in the vector starting at Fd.

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