### 4.3.1. Flexible second operand

Many ARM and Thumb-2 general data processing instructions have a flexible second operand. This is shown as `Operand2` in the descriptions of the syntax of each instruction. There are some differences in the options permitted for `Operand2` in ARM and Thumb-2 instructions.

#### Syntax

`Operand2` has two possible forms:

```#`constant`
```
````Rm`{, `shift`}
```

where:

`constant`

is an expression evaluating to a numeric constant. The range of constants available in ARM and Thumb-2 is not exactly the same. See Constants in Operand2 for details.

`Rm`

is the ARM register holding the data for the second operand. The bit pattern in the register can be shifted or rotated in various ways.

`shift`

is an optional shift to be applied to `Rm`. It can be any one of:

```ASR #n```

arithmetic shift right `n` bits. 1 ≤ `n` ≤ 32.

`LSL #n`

logical shift left `n` bits. 0 ≤ `n` ≤ 31.

`LSR #n`

logical shift right `n` bits. 1 ≤ `n` ≤ 32.

`ROR #n`

rotate right `n` bits. 1 ≤ `n` ≤ 31.

`RRX`

rotate right one bit, with extend.

`type Rs`

available in ARM only, where:

`type`

is one of `ASR`, `LSL`, `LSR`, `ROR`.

`Rs`

is an ARM register supplying the shift amount. Only the least significant byte is used.

### Note

The result of the shift operation is used as `Operand2` in the instruction, but `Rm` itself is not altered.

#### Constants in Operand2

In ARM instructions, `constant` can have any value that can be produced by rotating an 8-bit value right by any even number of bits within a 32-bit word.

In 32-bit Thumb-2 instructions, `constant` can be:

• Any constant that can be produced by shifting an 8-bit value left by any number of bits within a 32-bit word.

• Any constant of the form `0x00XY00XY`.

• Any constant of the form `0xXY00XY00`.

• Any constant of the form `0xXYXYXYXY`.

In addition, in a small number of instructions, `constant` can take a wider range of values. These are detailed in the individual instruction descriptions.

Constants produced by rotating an 8-bit value right by 2, 4, or 6 bits are available in ARM data processing instructions, but not in Thumb-2. All other ARM constants are also available in Thumb-2.

#### ASR

Arithmetic shift right by `n` bits divides the value contained in `Rm` by 2`n`, if the contents are regarded as a two’s complement signed integer. The original bit is copied into the left-hand `n` bits of the register.

#### LSR and LSL

Logical shift right by `n` bits divides the value contained in `Rm` by 2`n`, if the contents are regarded as an unsigned integer. The left-hand `n` bits of the register are set to 0.

Logical shift left by `n` bits multiplies the value contained in `Rm` by 2`n`, if the contents are regarded as an unsigned integer. Overflow can occur without warning. The right-hand `n` bits of the register are set to 0.

#### ROR

Rotate right by `n` bits moves the right-hand n bits of the register into the left-hand `n` bits of the result. At the same time, all other bits are moved right by `n` bits (see Figure 4.1).

Figure 4.1. ROR

#### RRX

Rotate right with extend shifts the contents of `Rm` right by one bit. The carry flag is copied into bit of `Rm` (see Figure 4.2).

The old value of bit of `Rm` is shifted out to the carry flag if the `S` suffix is specified (see The carry flag).

Figure 4.2. RRX

#### The carry flag

The carry flag is updated to the last bit shifted out of `Rm`, if the instruction is any one of the following:

• `MOV`, `MVN`, `AND`, `ORR`, `ORN`, `EOR` or `BIC`, if you use the `S` suffix

• `TEQ` or `TST`, for which no `S` suffix is required.

#### Instruction substitution

Certain pairs of instructions (`ADD` and `SUB`, `ADC` and `SBC`, `AND` and `BIC`, `MOV` and `MVN`, `CMP` and `CMN`) are equivalent except for the negation or logical inversion of `constant`.

If a value of `constant` is not available, but its logical inverse or negation is, the assembler substitutes the other instruction of the pair and inverts or negates `constant`.

Be aware of this when comparing disassembly listings with source code.

You can use the `--diag_warning 1645` assembler command-line option to check when an instruction substitution occurs.

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