2.4. Conditional execution

In ARM state, and in Thumb state on processors with Thumb-2, most data processing instructions have an option to update ALU status flags in the Application Program Status Register (APSR) according to the result of the operation. Some instructions update all flags, and some instructions only update a subset. If a flag is not updated, the original value is preserved. The description of each instruction details the effect it has on the flags. Conditional instructions that are not executed have no effect on the flags.

In Thumb state on pre-Thumb-2 processors, most data processing instructions update the ALU status flags automatically. There is no option to leave the flags unchanged and not update them. Other instructions cannot update the flags.

In ARM state, and in Thumb state on processors with Thumb-2, you can execute an instruction conditionally, based upon the ALU status flags set in another instruction, either:

Almost every ARM instruction can be executed conditionally on the state of the ALU status flags in the APSR. See Table 2.2 for a list of the suffixes to add to instructions to make them conditional.

In Thumb state, a mechanism for conditional execution is available using a conditional branch.

In Thumb state on processors with Thumb-2, you can also make instructions conditional using a special IT (If-Then) instruction. You can also use the CBZ (Conditional Branch on Zero) and CBNZ instructions to compare the value of a register against zero and branch on the result.

This section describes:

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