4.3.10. SEL

Select bytes from each operand according to the state of the APSR GE flags.


SEL{cond} {Rd}, Rn, Rm



is an optional condition code (see Conditional execution).


is the destination register.


is the register holding the first operand.


is the register holding the second operand.


The SEL instruction selects bytesfrom Rn or Rm according to the APSR GE flags:

  • if GE[0] is set, Rd[7:0] come from Rn[7:0], otherwise from Rm[7:0]

  • if GE[1] is set, Rd[15:8] come from Rn[15:8], otherwise from Rm[15:8]

  • if GE[2] is set, Rd[23:16] come from Rn[23:16], otherwise from Rm[23:16]

  • if GE[3] is set, Rd[31:24] come from Rn[31:24], otherwise from Rm[31:24].


Do not use r15 for Rd, Rn, or Rm.

Use the SEL instruction after one of the signed parallel instructions, see Parallel add and subtract. You can use this to select maximum or minimum values in multiple byte or halfword data.

Condition flags

This instruction does not change the flags.


This ARM instruction is available in ARMv6 and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above, except the ARMv7-M profile.

There is no 16-bit Thumb version of this instruction.


    SEL     r0, r4, r5
    SELLT   r4, r0, r4

The following instruction sequence sets each byte in r4 equal to the unsigned minimum of the corresponding bytes of r1 and r2:

    USUB8    r4, r1, r2
    SEL      r4, r2, r1
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