4.7.2. SBFX and UBFX

Signed and Unsigned Bit Field Extract. Copies adjacent bits from one register into the least significant bits of a second register, and sign extends or zero extends to 32 bits.

Syntax

op{cond} Rd, Rn, #lsb, #width

where:

op

is either SBFX or UBFX.

cond

is an optional condition code (see Conditional execution).

Rd

is the destination register.

Rn

is the source register.

lsb

is the bit number of least significant bit in the bitfield, in the range 0 to 31.

width

is the width of the bitfield, in the range 1 to (32-lsb).

Do not use r15 for Rd or Rn.

Condition flags

These instructions do not alter any flags.

Architectures

These ARM instructions are available in ARMv6T2 and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above.

There are no 16-bit Thumb versions of these instructions.

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