Registers specified in inline assembly instructions always denote virtual registers and not the physical ARM integer registers. Virtual registers require no declaration, and the size of the virtual registers is the same as the physical registers. However, the physical register used in the assembled code might be different to that specified in the instruction. See Virtual registers.

Function arguments, C or C++ variables, and other C or C++ expressions can be specified as register operands in an inline assembly instruction.

The type of an expression used in place of an ARM integer register must be either an integral type (that is, char, short, int or long), excluding long long, or a pointer type. No sign extension is performed on char or short types. You must perform sign extension explicitly for these types. The compiler might add code to evaluate these expressions and allocate them to registers.

When an operand is used as a destination, the expression must be a modifiable lvalue if used as an operand where the register is modified. For example, a destination register or a base register with a base-register update.

For an instruction containing more than one expression operand, the order that expression operands are evaluated is unspecified.

An expression operand of a conditional instruction is only evaluated if the conditions for the instruction are met.

A C or C++ expression that is used as an inline assembler operand might result in the instruction being expanded into several instructions. This happens if the value of the expression does not meet the constraints set out for the instruction operands in the ARM Architecture Reference Manual.

If an expression used as an operand creates a temporary that requires destruction, then the destruction occurs after the inline assembly instruction is executed. This is analogous to the C++ rules for destruction of temporaries.

A simple expression operand is one of the following:

Any expression containing one of the following is not a simple expression operand:

A register list can contain a maximum of 16 operands. These operands can be virtual registers or expression register operands.

The order that virtual registers and expression operands are specified in a register list is significant. The register list operands are read or written in left-to-right order. The first operand uses the lowest address, and subsequent operands use addresses formed by incrementing the previous address by four. This new behavior is in contrast to the usual operation of the LDM or STM instructions where the lowest numbered physical register is always stored to the lowest memory address. This difference in behavior is a consequence of the virtualization of registers.

An expression operand or virtual register can appear more than once in a register list and is used each time it is specified.

The base register is updated, if specified. The update overwrites any value loaded into the base register during a memory load operation.

Operating on User mode registers when in a privileged mode, by specifying ^ after a register list, is not supported by the inline assembler.

A C or C++ constant expression of an integral type might be used as an immediate value in an inline assembly instruction.

A constant expression that is used to specify an immediate shift must have a value that lies in the range defined in the ARM Architecture Reference Manual, as appropriate for the shift operation.

A constant expression that is used to specify an immediate offset for a memory or coprocessor data transfer instruction must have a value with suitable alignment.