RVISS consists of a series of modules, implemented as Dynamic Link Libraries (.dll files) for Windows, or as Shared Objects (.so files for Red Hat Linux, or .sdi on all platforms).

The main modules are:

There are alternative predefined modules for each of these parts. You can select the combination of processor and memory model you want to use.

One of the predefined memory models, mapfile, enables you to specify a simulated memory system in detail. It enables you to specify custom memory attributes, such as access width and wait states, for a defined address range.

In addition there are predefined modules which you can use to:

You can use different combinations of predefined modules and different memory maps.

You can write your own modules, or edit copies of the predefined ones, if the modules provided do not meet your requirements. For example:

The source code of some modules is supplied. You can use these as examples to help you write your own modules.