RealView® ARMulator® ISS User Guide 4.1.11. Stopping RVISS

4.1.11. Stopping RVISS

To stop RVISS, your model must call the stop_simulation() member of SimRdiProcVec. Before your model calls this function, it must provide a reason why it is stopping. This is done by filling out the stop_info structure and by setting stop_reason_valid to True.

The STATUS_INFO structure is declared in tmgrem.h where more detailed information is available, and it has the following members:

detail

Holds extra information depending on the value of the mode field.

mode

Set this to one of the values specified by STATUS_MODE. Commonly used values are:

SMODE_UNKNOWN: Unknown reason.
SMODE_SIG: An exception, signal, or other event stopped RVISS. The detail field contains a reason for stopping. See Built-in stop reasons for a list of built-in stop reasons.
SMODE_SIG_MEM: An exception on memory stopped RVISS. The detail field contains a reason for stopping. See Built-in stop reasons for a list of built-in stop reasons.
SMODE_GLOBRK: A global break stopped RVISS. The detail field contains the global break handle as described in the section on global break adverts.

trip_page

If you know the address of the reason for the stop then set this to 0. Otherwise set this to 0xFFFFFFFF.

trip_addr

If you know the address of the reason for the stop then set this to the address. Otherwise set this to 0xFFFFFFFF.

If the target gets into a state where it cannot execute:

Set mode to SMODE_SIG.
Set detail to OSIG_BADSTATE (see Table 4.1).
Clear the srpv->target_is_executable flag.

If your model outputs an error message through the host interface:

Set mode to SMODE_SIG.
Set detail to OSIG_ERROR_MSG (see Table 4.1).

Built-in stop reasons

The built-in reasons for stopping begin with the prefix OSIG_, and they are declared in the enumeration GEN_SIGNALS in tmgrem.h. The reasons are listed in Table 4.1.

Table 4.1. Built-in stop reason values

Reason value	Description
`OSIG_USER_HALT`	Halted by user action
`OSIG_EMU_STOP`	Stop from emulator
`OSIG_ILL_OP`	Illegal instruction
`OSIG_MEM_VIOL`	Memory access violation
`OSIG_TIME_OUT`	Time-out from emulator
`OSIG_NO_POWER`	No target power detected
`OSIG_BUSY`	Target not responding because it is busy
`OSIG_ERROR`	Unknown error
`OSIG_ERROR_MSG`	Error from target
`OSIG_RESET`	Reset of target
`OSIG_ABORT`	Aborted
`OSIG_BADSTATE`	Bad state
`OSIG_BUSERR`	Bus error
`OSIG_INT`	Interrupt
`OSIG_TRAP`	Trap to use
`OSIG_ANA_FULL`	Analyzer full
`OSIG_ANA_TRIG`	Analyzer triggered
`OSIG_GLOBRK`	Global break detected
`OSIG_BRANCH`	Control flow breakpoint
`OSIG_REGBRK`	Register breakpoint

Copyright © 2002-2007 ARM Limited. All rights reserved.	ARM DUI 0207D
Non-Confidential
PDF version