4.6. The memory interface
The memory interface is the interface between the RVISS core
and the memory model.
Because there are many core processor types, there are many
memory type variants. The memory initialization function is told
which type it must provide (see Memory model initialization
function). A model must refuse to initialize in
the case of an unrecognized memory type variant.
Note
The nTRANS signal from
the processor is not passed to the memory interface. Because this
signal changes infrequently and might not be used by a memory model,
a model must use TransChangeUpcall() to track nTRANS. You can find the prototype
for TransChangeUpcall in armul_mem.h.
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