1.2.2. Memory

The memory system consists of SSRAM memory (32-bits wide) and a plug-in SDRAM DIMM (64-bits wide, no parity, no ECC).

The SDRAM DIMM controller can be implemented within the IM-LT3 FPGA (see the application notes for the IM-LT3). If an appropriate SDRAM controller is included in the FPGA image, the SDRAM can be accessed by the local processor, by processors on other tiles, and by other system bus masters.

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