2.2. Using the IM-LT3 with an Integrator/CP

Attach the IM-LT3 onto a Integrator/CP baseboard by engaging the connectors on the bottom of the Interface Module with the corresponding connectors on the top of the baseboard.

Figure 2.6. Integrator/CP with IM-LT3 and Core Tile

The processor (or processors) for the system can be provided by:

To fit the IM-LT3 to the Integrator/CP:

  1. If the system is not using a Core Tile or SMM to provide the processor, connect a Core Module to the HDRA/HDRB connectors on the Integrator/CP.

  2. Mount the IM-LT3 on to the HDRA/HDRB connectors of the Integrator/CP (or the Core Module if used).

  3. Optionally, fit an SDRAM DIMM (see Fitting an SDRAM DIMM).

  4. If the system is not using a Core Module or SMM to provide the processor, connect a Core Tile to the IM-LT3 HDRX/HDRY/HDRZ connectors.

  5. Optionally, connect one or more Logic Tiles to the IM-LT3.

  6. Supply power to the CP baseboard by connecting a bench power supply to the Integrator/CP power terminals or the supplied brick power supply to the DC INPUT jack. (Do not connect power to both the Integrator/CP and the IM-LT3, see also Power supplies)

  7. Connect a JTAG device (Multi-ICE or RealView ICE) to the IM-LT3 (see Connecting Multi-ICE, RealView ICE or Trace).

  8. Download the appropriate images to the FPGAs present on the IM-LT3 and Logic Tiles (see Chapter 4 Configuring the FPGA and PLD).

Figure 2.7. CP with Core Module, IM-LT3, and Logic Tile

The general purpose pushbutton S2 generates the nPB signal to the FPGA. For the supplied Integrator/CP FPGA image, this signal triggers a reset of the board stack.

Copyright © 2005, 2006 ARM Limited. All rights reserved.ARM DUI 0216B