A.8. Mictor logic analyzer connectors

Two Mictor connectors on the IM-LT3 enable monitoring of header signals by an external logic analyzer. Figure A.7 shows the pinout of the Mictor connectors.

Table A.6 lists the pinouts of debug connector J11. A logic analyzer can be attached to J11 to monitor signals YU[179:153]. If an SMM is implemented in the FPGA on an attached Logic Tile, signals YU[179:153] can be used as a trace port for the synthesized core. The Trace signal names in Table A.6 refer to the signal names typically used on trace connectors. The IM-LT3 signal names refer to the signals names used on the on the IM-LT3 schematic.

Figure A.7. Mictor connector pinout

Table A.6. Trace/Debug connector (J11)

IM-LT3 signalTrace signalPinTrace signalIM-LT3 signal
NCNC12NCNC
NCNC34NCNC
GNDGND56TRACECLKYU179
YU177DBGRQ78DBGACKYU168
nSRSTnSRST910EXTTRIGYU167
TDOTDO11123V3YU166
RTCKRTCK13143V3YU165
TCKTCK1516TRACEPKT7YU164
TMSTMS1718TRACEPKT6YU163
TDITDI1920TRACEPKT5YU162
nTRSTnTRST2122TRACEPKT4YU161
YU176TRACEPKT152324TRACEPKT3YU160
YU175TRACEPKT142526TRACEPKT2YU159
YU174TRACEPKT132728TRACEPKT1YU158
YU173TRACEPKT122930TRACEPKT0YU157
YU172TRACEPKT113132PIPESTAT3YU156
YU171TRACEPKT103334PIPESTAT2YU155
YU170TRACEPKT93536PIPESTAT1YU154
YU169TRACEPKT83738PIPESTAT0YU153

Table A.7 lists the pinouts of debug connector J4. A logic analyzer can be attached to J4 to monitor signals XU[179:146]. (These signals are present on the upper HDRX connector.)

Table A.7. Debug connector (J4)

IM-LT3 signalPinPinIM-LT3 signal
NC12NC
NC34NC
XU17956XU178
XU17778XU161
XU176910XU160
XU1751112XU159
XU1741314XU158
XU1731516XU157
XU1721718XU156
XU1711920XU155
XU1702122XU154
XU1592324XU153
XU1582526XU152
XU1572728XU151
XU1562930XU150
XU1553132XU149
XU1543334XU148
XU1533536XU147
XU1773738XU146
Copyright © 2005, 2006 ARM Limited. All rights reserved.ARM DUI 0216B
Non-Confidential