2.4.1. Image selector switches

The IM-LT3 has two FPGA image selection switches (marked FPGA image switch in Figure 2.10) that are used to select FPGA images under local or global control.

The CFGSEL[1:0] signals are set from an attached motherboard are not used to select the image in the PLD image supplied at manufacture. Resistor links R41, R42, R43, and R44 set the default value if no motherboard is present. See Chapter 4 Configuring the FPGA and PLD.

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