This document is organized into the following chapters:

Chapter 1 Introduction

Read this chapter for an introduction to the IM-LT3. This chapter shows the physical layout of the IM-LT3 and identifies the main components.

Chapter 2 Getting Started

Read this chapter for a description of how to set up and start using the Integrator/IM-LT3 with other boards or standalone. This chapter describes how to connect the IIM-LT3 and how to apply power.

Chapter 3 Hardware Description

Read this chapter for a description of the hardware architecture of the IM-LT3. This chapter describes the clocks, resets, and debug hardware provided by the IM-LT3 and the header signals used by attached boards.

Chapter 4 Configuring the FPGA and PLD

Read this chapter for a description of how the Xilinx FPGA in the IM-LT3 is configured at power-up, the configuration options available, and how to download your own FPGA configurations.

Appendix A Signal Descriptions

Refer to this appendix for signal descriptions and connector pinouts.

Appendix B Specifications

Refer to this appendix for electrical and mechanical specifications.

Appendix C Using a Core Tile and an IM-LT3 as a Core Module

This appendix describes the use of a CT7TDMI, CT926EJ-S, CT1026EJ-S, or CT1136JF-S Core Tile and an IM-LT3 to duplicate the functionality of the equivalent Core Module on an Integrator/CP running legacy applications.

Copyright © 2005, 2006 ARM Limited. All rights reserved.ARM DUI 0216B