4.14. MultiPort Memory Controller, MPMC
The Multiport Memory Controller (MPMC)
is an AMBA compliant SoC peripheral that is developed, tested, and
licensed by ARM Limited.
Table 4.40. MPMC implementation
| Property | Value |
|---|
| Location | ARM926PXP development chip |
| Memory base address | 0x10110000 |
| Interrupt | NA |
| DMA | The MPMC does not use interrupts or DMA. DMA
transfers, however, can be set up to access memory controlled by
the MPMC. |
| Release version | ARM MPMC GX175 r0p0-00alp2 |
| Reference documentation | ARM PrimeCell Multiport Memory Controller
(GX175) Technical Reference Manual (see also Memory interface) |
The MPMC controls the dynamic memory on the Versatile/AB926EJ-S.
SyncFlash is supported on the dynamic memory bus but it cannot
be selected as boot memory.
Sample programs that configure and use dynamic memory can
be found on the CD that accompanies the Versatile/AB926EJ-S.
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