7.3.1. Memory expansion boards

The Core Tile contains two memory connectors for expansion memory boards:

J7

Y memory expansion connector (Y MEMEXP).

J8

Z memory expansion connector (Z MEMEXP).

Note

Typically the expansion boards contain static RAM or flash memory. The memory connectors conform to the PISMO standard. Refer to the PISMO Memory Interface Connector Specification and Appendix A Static Memory Expansion Board for details on signals on the connectors and signals. Different memory boards might require special interface software or configuration settings.

The memory controller for expansion memory must be implemented in an external Logic Tile (or IM-LT3). The memory expansion signals are connected directly to HDRY and HDRZ. The Core Tile test chip is not connected to the memory expansion sockets.

To use the SSTL standard for a PISMO board on the Y MEMEXP connector, fit resistor links R26, R27, and R28.

The test chip on the CT7TDMI Core Tile can be disabled to allow the Core Tile to function as a dedicated memory tile (see Disabling the test chip output signals).

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