Part 1. Introduction

Table of Contents

1. Introduction
1.1. About the Core Tiles
1.2. Overview of Core Tiles
1.2.1. System architecture
1.2.2. External logic
1.2.3. ARM processor test chip
1.2.4. PLD
1.2.5. Processor bus
1.2.6. Memory
1.2.7. Clock generation
1.2.8. JTAG and Trace
1.2.9. Power supply control
1.2.10. Links and indicators
1.3. Precautions
1.3.1. Ensuring safety
1.3.2. Preventing damage
2. Getting Started
2.1. Using the Core Tile with an Interface Module
2.2. Using the Core Tile with an Integrator Compact Platform baseboard
2.3. Using the Core Tile with a Versatile Baseboard
2.4. Using the Core Tile with a custom baseboard
2.5. Connecting power
2.5.1. Supplying power to an Interface Module
2.5.2. Supplying power to a baseboard
2.6. Connecting RealView ICE or Multi-ICE
2.6.1. Connecting a JTAG device to an Interface Module
2.6.2. Connecting a JTAG device to a baseboard
2.7. Connecting Trace
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